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UltraCMOS® Process Technology Overview


The global wireless communications industry has entered the new millennium. The need for products and components that are smaller, more efficient and less expensive is greater than any time ever before. Monolithic integration has come of age.


Using its patented UltraCMOS® technology, Peregrine has mastered the technique of processing Ultra-Thin Silicon (UTSi®) circuitry on an insulating dielectric sapphire substrate. With this technology, Peregrine is producing integrated circuits (ICs) that are expanding customer options by providing advances in speed and power at a lower cost.


The UltraCMOS process is a patented Silicon-on-Sapphire technology (SOS) that has for years been recognized as a technically superior semiconductor vehicle reserved for highly specialized military and space projects. SOS was thought to be impossible to manufacture in commercial volumes at a reasonable cost. Overcoming these challenges without sacrificing the inherent benefits of the technology took many years of research and development, all now protected by numerous patents. The UltraCMOS® process is the industry’s first and only commercially qualified use of Ultra-Thin-Silicon (UTSi®) on sapphire substrates enabling the combination of high-performance RF, mixed-signal, passive elements, nonvolatile memory and digital functions on a single device.


This monolithic integration provides significant performance advantages over competing mixed-signal processes such as GaAs, SiGe, BiCMOS and bulk silicon CMOS in applications where RF performance, low power and integration are paramount. Additionally, because UltraCMOS devices are fabricated in standard high-volume CMOS facilities, products benefit from the fundamental reliability, cost effectiveness, high yields, scalability and integration of CMOS, while achieving the peak performance levels historically expected from SiGe and GaAs.


Peregrine’s combination of process architecture, circuit designs, and device modeling has enabled an accelerated technology roadmap. In 2013, Peregrine announced the latest generation of UltraCMOS® process technology—Semiconductor Technology Platform 8 (STeP8). The on-resistance, off-capacitance (RonCoff) product is a key figure of merit for RF process technologies and important in the selection of RFFE components. Figure 2 shows how STeP8 technology shows a 36% improvement in RonCoff performance over the previous generation of UltraCMOS, STeP5—dramatically improving the linearity, insertion loss, and isolation capabilities of Peregrine’s RFIC products.


STeP8 RonCoff Graph


The 4G LTE network has introduced significant challenges to the RF Front End of smart phones, including a fragmented RF spectrum, which causes co-existence issues between bands and other connectivity standards such as GPS, WiFi®, and Bluetooth®. To ensure consistent, reliable operation within the LTE environment, mobile wireless device designers are required to incorporate high performance components into the RF Front End while maintaining a small form factor. Highly-integrated RF Front End modules such as those that UltraCMOS STeP8 enables provide an ideal combination of high linearity and low insertion loss in a single, monolithically-integrated device.


Download our UltraCMOS® Process Overview